Single input/multiple output logic interface circuit having minimized

Abstract

A single input/multiple output NOR gate employs a reference voltage source for establishing the operational level of a multiple output current logic driver transistor. As the reference voltage source, the forward base-emitter voltage V.sub.be of a second transistor is used. Coupled between the current logic driver transistor and the second transistor is a multiple emitter diode-connected input transistor. One of the emitters of the input transistor is coupled in the current flow path from the current logic driver transistor to a current control resistor that is coupled in parallel with the base-emitter junction of the reference transistor, while a second emitter of the input transistor is coupled to the collector-emitter current flow path of the second (reference) transistor. In the absence of the application of current to the input transistor, the voltage level at the input is effectively equal to the sum of the forward base-emitter voltage drops of the input and second transistors. In response to the application of current to the input transistor excess input current is diverted via the second emitter of the multiple emitter input transistor and the collector-emitter path of the second transistor. Yet, because the voltage level at the input remains defined in accordance with the sum of the base-emitter voltage (V.sub.be) drops across the series connection of the base-emitter junctions of the input and second transistors, the voltage level at the input is substantially unchanged (or minimized).