The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1987
Filed:
Feb. 19, 1985
Hemmige D Varadarajan, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A multilevel differential logic gate circuit for generating a plurality of levels of logic includes a single constant current source having its one end connected to a ground potential. The current source has a relatively small voltage drop. A first differential amplifier formed of a pair of first and second transistors have their emitters coupled together and to the other end of the current source to define a first level of logic. A second differential amplifier formed of a pair of third and fourth transistors have their emitters coupled together and to the collector of the first transistor to define a second level of logic. A third differential amplifier formed of a pair of fifth and sixth transistors have their emitters coupled together and to the collector of the third transistor to define a third level of logic. A fourth differential amplifier formed of a pair of seventh and eights transistors have their emitters coupled together and to the collector of the fifth transistor to define a fourth level of logic. The collector of the seventh transistor is connected to a supply potential via a first resistor. The collector of the eighth transistor is connected also to the supply potential via a second resistor.