The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1987
Filed:
Jan. 23, 1985
Tsuyoshi Ando, Tokyo, JP;
Yasunobu Okano, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A logic circuit comprises an input terminal receiving an input signal of input pulses; first and second stages of C-MOS circuit formed by a first MOS FET of one channel type formed in said semiconductor substrate of one conductivity type and a second MOS FET of other channel type formed in well region of other conductivity type formed in the semiconductor substrate, said first and second stages being connected in a cascade connection; a first power terminal applying a first power voltage to the semiconductor substrate; a second power terminal applying a second power voltage to the well region; and a pulse converter converting the input signal to a pulse signal having a reference voltage of the second power voltage and short width pulses of the first power voltage produced in synchronism with the input pulses.