The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 1987
Filed:
Oct. 16, 1984
Applicant:
Inventors:
Robert M Reinschmidt, San Jose, CA (US);
Wylie J Plummer, Felton, CA (US);
Assignee:
Trilogy Systems Corporation, Cupertino, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365189 ; 365193 ;
Abstract
An integrated circuit memory system having an array of ECL memory cells, an address circuit, a READ/WRITE circuit and a coupling circuit which increases the operating current of an addressed memory cell during a READ/WRITE operation. The increased operating current is short enough to prevent an excessive saturation of the memory cell transistors. The addressed memory cells remain in a low operating current sufficient to maintain the memory cells in their particular states. Since timing is critical, timing circuits for a system clock are also part of the memory system.