The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 1987

Filed:

Jun. 20, 1984
Applicant:
Inventors:

James R Weatherford, Lake Dallas, TX (US);

Arthur T Kimmel, Dallas, TX (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364900 ;
Abstract

A read/modify/write circuit (10) for a computer is used in conjunction with a main memory (12) in which block operations are executed using a plurality of data units. The circuit (10) includes a first register connected to receive a data block from the main memory (12), a second register connected to receive data units from a requestor, such as a processor (18) and a third register in which a resulting data block is produced which comprises the data units to be written into the main memory (12) and the remaining data units which were previously in the block read from memory (12). Multiplex circuits (70, 72, 74, 76, 78, 80, 82 and 84) are commanded by a decoder (136) in response to the processor (18) to selectively route sections of registers (26 and 28) into a register (106). The resulting data block is then transferred through the memory bus (14) for writing into the main memory (12). The outputs of the multiplexors (70-84) can be driven by the decoder (136) to a predetermined logic state so that a selected data block can be written into the main memory (12) for test and evaluation purposes.


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