The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 1987

Filed:

Apr. 24, 1981
Applicant:
Inventors:

Bantval J Baliga, Clifton Park, NY (US);

Michael S Adler, Schenectady, NY (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307570 ; 3072 / ; 307304 ; 307305 ; 307571 ;
Abstract

A solid state composite control circuit includes a normally-off gating device connected in series with a normally-on high voltage semiconductor device so that the combination operates as a normally-off high power semiconductor device. The control device is a low voltage semiconductor device, which can switch rapidly with very low gate turn-off current during turn-off of the composite circuit. In a particular example, a low voltage, normally-off, MOSFET is connected in series with the cathode of a high voltage, normally-on FCT. In another example, a low voltage, normally-off, MOSFET is connected in series with the source of a high voltage, normally-on JFET. The composite circuit has a very high turn-off gain as well as high dv/dt and di/dt capability.


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