Programmable realtime interface between a block floating point processor

Abstract

The programmable interface gives a Block Floating Point processor the capability of performing various real-time signal algorithms on collected radar data in an external batch memory. Normally, Block Floating Point processors are not capable of accommodating data having varying exponent scales such as the data received from a batch memory in a radar system. The programmable interface solves the exponential normalization process using two data paths, an instruction processor, a microcode processor, a pre-shift control and an address generator. Data flow instructions are passed from the instruction processor to the microcode processor which executes the particular instruction's timing sequence. The first data path passes data from the batch memory to the array processor and contains a pre-shifter to normalize the batch memory-stored data. The second data path passes the processed data from the processor to the batch memory. The pre-shifter portion of the first data path is controlled by a pre-shifter control section in the invention, which generates a 4-bit code used to command the pre-shifter. Finally, an address generator creates a sequence of fetch and store addresses for data travelling between the batch memory and the array processor.