The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 1987
Filed:
Oct. 26, 1984
Setsuo Ogura, Takasaki, JP;
Shizuo Kondo, Takasaki, JP;
Eiji Minamimura, Takasaki, JP;
Makoto Furihata, Tamamura, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
An integrated programmable logic array formed within a single silicon chip comprises a combination of an NAND or AND gate array and an NOR or OR gate array. The NAND or AND gate array includes a plurality of bipolar transistors which are driven to operate in the forward direction by a plurality of input signals, and a plurality of Schottky barrier diodes provided between the collectors of the bipolar transistors and output signal lines. The NOR or OR gate array includes a plurality of other bipolar transistors which are driven to operate in the backward direction by a plurality of output signals from the NAND or AND gate array.