The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 1987

Filed:

Jan. 24, 1984
Applicant:
Inventor:

Takashi Agatsuma, Kodaira, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; B44C / ; C03C / ; C03C / ;
U.S. Cl.
CPC ...
156643 ; 29571 ; 2957 / ; 29580 ; 148187 ; 156646 ; 156648 ; 156649 ; 156651 ; 156653 ; 156657 ; 1566611 ; 156662 ; 357 49 ;
Abstract

A semiconductor device having a LOCOS region formed on a Si substrate comprises a minute groove filled with non-oxidizable isolation film provided at the boundary between the LOCOS region and an IC area to be formed on the Si substrate. The non-oxidizable isolation film prevents the intrusion of thermal oxidation for the LOCOS region into the IC region, and is of silicon nitride 1000-10000 .ANG. width. A method of manufacturing a semiconductor device having a LOCOS region formed on a Si substrate comprises the steps of depositing a silicon nitride film on the substrate; etching a minute width region at the boundary between an area to be the LOCOS region and an area to be an IC region on the substrate by anisotropic etching with a reactive ion etching mode, thereby to form a groove thereat thermal-oxidizing the Si substrate to form a thin SiO.sub.2 film on an area to be covered with silicon nitride; filling the groove with silicon nitride; thermal-oxidizing a part of the Si substrate other than the area covered with silicon nitride films formed previously; and removing the silicon nitride film deposited at the first step to flatten the surface of the Si substrate.


Find Patent Forward Citations

Agatsuma, Takashi. (1987). Method for manufacturing semiconductor device having isolating groove (U.S. Patent No. 4657630). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4657630

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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