The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 1987

Filed:

Mar. 14, 1986
Applicant:
Inventors:

Shigeo Aoki, Habikino, JP;

Junichi Tamamura, Yao, JP;

Yasuhiro Ukai, Yao, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; B44C / ; C03C / ; C23F / ;
U.S. Cl.
CPC ...
1566591 ; 156655 ; 156656 ; 156657 ; 156662 ; 156667 ; 350332 ; 3503 / ; 428-1 ;
Abstract

An array of thin film transistors is fabricated by forming a plurality of spaced closely adjacent metallic source and drain electrodes on an array area of a transparent substrate, forming semiconductor layers on the substrate between each adjacent pair of source and drain electrodes in overlapping relation to the edges of each such pair, covering the semiconductor layers with a gate insulation film that extends over substantially all of said array area, forming a transparent gate electrode layer over the gate insulation film, covering the transparent gate electrode layer with a photosensitive resin layer which is then exposed to light through the transparent substrate and transparent gate electrode layer with the metallic source and drain electrodes acting as masks, developing the photosensitive resin layer to remove portions thereof other than the exposed portions, and etching the transparent gate electrode with the remaining portions of the resin layer serving as masks thereby to form the gate electrodes of the thin film transistors in the array.


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