The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 1987
Filed:
Nov. 04, 1985
Steven L Crain, Phoenix, AZ (US);
Homer W Miller, Peoria, AZ (US);
Honeywell Information Systems Inc., Phoenix, AZ (US);
Abstract
An apparatus for storing information contained in a selected digital data signal comprises a selector. A first input terminal receives an operational digital data signal when the apparatus is operating in a normal mode, a second input terminal receives a shifted test data signal when the apparatus is operating in a maintenance mode, and a third input terminal is operatively connected to a signal having a constant reset state. The selector operatively connects one of the first, second, and third input terminals to the output terminal of the selector in response to a first and second control signal. A storage element, having a clock input terminal adapted to receive a clock signal and having a reset terminal adapted to receive a reset signal, stores the state present at the selected input terminal of the selector coincident with the clock signal. A switching element couples the second control signal to the reset terminal of the storage element when the apparatus is in the normal mode thereby causing the apparatus to be placed in a rest state immediately upon the occurrence of the second control signal asynchronously to the clock signal, and couples the second control signal to the selector in the maintenance mode thereby causing the third input terminal of the selector to be operatively connected to the output terminal of the selector causing the apparatus to be placed in the reset state coincident with the clock signal, the second control signal having priority over the first control signal in the selection of the input terminals of the selector.