Coherent data word transfer by an asynchronous gateway data port

Abstract

A gateway data port for coherently transferring multiple-bit input data words in series as part of an input data chain onto an input data line that serially connects the gateway data port and other data ports to a receiver and for coherently transferring multiple-bit output data words from an output data line that serially connects the gateway data port and other data ports to a transmitter. The input data words are provided to the gateway data port asynchronously with the transfer onto the input data line; and the output data words are transmitted over the output data line as part of an output data chain to the gateway data port asynchronously with the transfer from the output data line. The input data words are transferred coherently through an asynchronous receiver and a buffer into an input data shift register, which includes a serial block of adjacent input data register stages defining a plurality of data word bit positions in the input data chain. An 'input data present' bit register stage and an 'input break' bit register stage are connected in series with the input data register stages and respectively define an input data present bit position and an input break bit position in the input data chain. The input data words are serially shifted onto the input data line from the input data chain shift register. Output data words are serially shifted from the output data line through an output data chain shift register similar to the input register, and transferred coherently then through a buffer and an asynchronous transmitter.