The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 1987
Filed:
Apr. 11, 1984
Takao Kobayashi, Hitachi, JP;
Shigeo Abe, Katsuta, JP;
Tadaaki Bandoh, Ibaraki, JP;
Masao Takatoo, Katsuta, JP;
Hidekazu Matsumoto, Hitachi, JP;
Hideyuki Hara, Hitachi, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi Engineering Co., Ltd., Ibaraki, JP;
Abstract
A pipelined adder for adding or subtracting two floating point input data each expressed by a sign data, an exponent data and a mantissa expressed in a sign-magnitude format, in accordance with an external operation mode designation signal to produce a floating point sum or difference data in a sign-magnitude format. In a first stage of the adder, the magnitudes of the exponent data of the input data are compared by a subtractor or a comparator and the magnitudes of the mantissa data of the input data are compared by a subtractor or a comparator. An actual operation mode for the mantissa data of the input data is determined, on the basis of the compare results of the exponent data and the mantissa data and the external operation mode designation signals, so that the operation result data is always expressed in a sign-magnitude format.