The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 1987
Filed:
Nov. 04, 1983
Applicant:
Inventors:
Naokazu Miyawaki, Yokohama, JP;
Mitsugi Ogura, Yokohama, JP;
Assignee:
Tokyo Shibaura Denki Kabushiki Kaisha, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; G11C / ;
U.S. Cl.
CPC ...
307269 ; 307601 ; 307603 ; 307584 ; 307578 ; 307268 ; 307262 ; 377 68 ;
Abstract
A dynamic type semiconductor memory device having refreshing function includes a clock pulse generating circuit having a row clock pulse generating section which includes a plurality of cascade-connected delay circuits, a plurality of MOS transistors selectively connected between said delay circuits, and a gate control circuit for changing conduction resistances of the MOS transistors according to the level of a refreshing signal.
Miyawaki, Naokazu. (1987). Memory clock pulse generating circuit with reduced peak current (U.S. Patent No. 4644184). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4644184
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile