The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 1987

Filed:

Oct. 03, 1985
Applicant:
Inventors:

Tsutomu Noda, Yokohama, JP;

Keiro Shinkawa, Yokohama, JP;

Nobutaka Amada, Yokohama, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D / ; H03D / ; H04L / ;
U.S. Cl.
CPC ...
329 50 ; 329124 ; 370 11 ; 370100 ; 375 77 ; 375 81 ; 375 88 ; 375120 ; 455202 ; 455260 ;
Abstract

A phase locked loop circuit for use in a heterodyne receiver for stably demodulating a carrier-suppressed double-sideband signal such as a 2-phase or 4-phase PSK signal. The phase locked loop circuit comprises a reference oscillator oscillating at a frequency corresponding to an intermediate frequency, and the frequency difference between the reference frequency and the input frequency is detected by a Costas loop, a signal indicative of the frequency difference being fed back to a local oscillator through a loop filter thereby stabilizing the intermediate frequency.


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