Apparatus for maintaining constant frequency in a dc to square wave

Abstract

A DC to square wave inverter (100) includes a saturable transformer (T102). The current through the saturable transformer (T102) is determined by the load current of the inverter (100). Current through the saturable transformer (T102) flows through two diodes (D100, D101) and through the base emitter junction of a power transistor (Q101). As the load current increases, the current through the diodes (D100, D101) and the power transistor (Q101) increases. This causes an increase in the voltage across the saturable transformer (T102), thus decreasing the amount of time it takes for the saturable transformer to go into saturation. A negative resistance element is coupled in series between the diodes (D100, D101) and the saturable transformer (T102). The voltage rise across the negative resistance element increases in response to increased current coming out of the saturable transformer (T102) and through the diodes (D100, D101). Similarly, the voltage rise across the negative resistance element decreases when the current out of the saturable transformer (T102 ) decreases. This is because the negative resistance element is actually a resistor (R100) coupled across a second transformer (T103). The current through the windings of the second transformer (T103) is fixed by the current through the saturable transformer (T102). However, the current through the second transformer (T103) flows in a direction opposite the current from the saturable transformer (T102). Accordingly, the negative resistance element cancels any increased voltage drop across the diodes and transistor caused by increased load current.