The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 1987
Filed:
Nov. 08, 1984
Glen R Sherwood, Jr, Hillsboro, OR (US);
James B Moon, Portland, OR (US);
Gordon A Moyle, Portland, OR (US);
SpaceLabs, Inc., Chatsworth, CA (US);
Abstract
A method for dynamically assigning addresses to new modules as they are coupled to a communication system with a synchronous data link control (SDLC) bus is described. These modules communicate with a display unit via the SDLC bus. The SDLC bus is controlled by a primary station in the display unit, with all modules acting as secondary stations. The primary station periodically broadcasts a time-tag to all modules at a thirty-two hertz rate. At power up, each module obtains a number, module 16, derived from the lower four bits of its unique twenty-four bit serial number. The module uses this number as a count of the number of time-tags which must occur before the module responds to the primary with an address request. If there are no collisions with other modules, the primary sends the module a packet which assigns the module the next available address. In the event of a collision (i.e., two or more modules request an address at the same time), the primary SDLC controller detects a CRC error and ignores the SDLC frame. The modules will each time-out and obtain a new number, modulo 16, derived from the next significant four bits of the module serial number. This process continues until the module obtains an address.