The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 1987

Filed:

Dec. 27, 1985
Applicant:
Inventor:

Veikko R Saari, Spring Lake Heights, NJ (US);

Assignee:

AT&T Bell Laboratories, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330253 ; 330258 ;
Abstract

An MOS differential input stage circuit (10) includes first (M1) and second (M2) differential input transistors with input nodes at their gates and output nodes at their drains. The sources are connected to a first current source (24). A second pair of differential transistors (M3,M4) which have their sources connected to a second current source (28), their drains connected to a reference voltage node, and their gates common to the respective first differential input transistors, have their bulk regions in common with the bulk regions (20) of the first differential transistors for isolation from supply voltage noise and from common mode input signal effects.


Find Patent Forward Citations

Saari, Veikko. (1987). Cmos differential amplifier stage with bulk isolation (U.S. Patent No. 4638259). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4638259

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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