The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 1987

Filed:

Oct. 25, 1984
Applicant:
Inventor:

Ryoichi Hirano, Itami, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
148171 ; 148172 ; 148190 ; 2956 / ;
Abstract

A method of manufacturing a semiconductor light emitting device comprises the steps of: forming a p-InP first semiconductor layer (11) on a p-type semiconductor substrate (10) by a first growth or diffusion; forming a groove (15) shaped like a stripe in the substrate and the first semiconductor layer; and successively forming a p-InP second semiconductor layer (12), a p or n-InGaAsP third semiconductor layer (13) and an n-InP fourth semiconductor layer (14) in the regions including the inner and outer portions of the grooves by the second growth. In this manufacturing method, the carrier concentration of the p-type impurity in the first semiconductor layer is selected to be higher than the carrier concentration in the fourth semiconductor layer. As a result, by the growth process of the respective semiconductor layers in the inner and outer portions of the groove or by the heat treatment after a growth process, the impurity can be diffused from the first semiconductor layer into the fourth semiconductor layer and the p-n junction faces can be moved from the inner surfaces of the groove into the fourth semiconductor layer.


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