The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 1987

Filed:

Feb. 08, 1984
Applicant:
Inventors:

Norio Yamada, Hadano, JP;

Hayashi Kajitani, Hadano, JP;

Kyoji Chiba, Hadano, JP;

Mitsugu Edagawa, Hadano, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364491 ; 364300 ;
Abstract

In the fabrication of an electronic circuit such as an integrated circuit, a method of determining the arrangement of logic circuit devices on a circuit board on the basis of a logic data defining the logic circuit devices and the interconnections among them. The logic circuit devices are classified in groups in accordance with a degree that each signal line connected with the logic circuit devices requires the expedition of signal propagation therethrough. First, the logic circuit devices belonging to the group pertinent to the highest degree are arranged, and next those belonging to the group pertinent to the second highest degree are arranged. Such a processing is carried out for all the groups.


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