The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 1987

Filed:

Feb. 26, 1985
Applicant:
Inventors:

Akira Hirota, Chigasaki, JP;

Takuya Tsushima, Ayase, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N / ; G11C / ;
U.S. Cl.
CPC ...
358160 ; 358213 ; 365 45 ;
Abstract

A video signal delay circuit comprises an input horizontal transfer register supplied serially with an input composite video signal, an input vertical transfer gate, a plurality of columns of vertical transfer registers, an output vertical transfer gate, an output horizontal transfer register, a horizontal transfer clock pulse generating circuit, a vertical transfer clock pulse generating circuit and a vertical transfer gate pulse generating circuit. The vertical transfer clock pulse generating circuit generates a vertical transfer clock pulse at a rate of once per one horizontal scanning period of the input composite video signal and additionally generates one or more vertical transfer clock pulses during a specific time period. Or, the horizontal transfer clock pulse generating circuit generates a horizontal transfer clock pulse having a selected phase or a selected number of horizontal transfer clock pulses.


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