The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 1986
Filed:
May. 02, 1985
Demetrios Balderes, Wappingers Falls, NY (US);
Andrew J Frankovsky, Endwell, NY (US);
Robert A Jarvela, Wappingers Falls, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A direct module powering scheme is disclosed. A plurality of integrated circuit chips are mounted on a module. The module is mounted on a printed circuit board. A plurality of metallization layers are distributed in parallel fashion within the module. A voltage tab is mounted on the edge of the module substrate and in contact with the edge of the metallization layers. The voltage tab may be attached to a source of power for providing the necessary voltage and current to the module needed to power the chips mounted on the module. The metallization layers comprise voltage distribution layers and voltage reference (ground) layers. The voltage tab is connected to the edge of the voltage distribution layer. A plurality of plated vias are disposed through the module in contact with one or more of the metallization layers. A plurality of voltage distribution stripes are disposed on the bottom of the module substrate and in contact with the plated vias for providing the necessary voltage and current to remotely-located chips, relative to the voltage tab, needed to power the chips. The energizing current from the power source energizes the chips mounted on the module by way of the voltage tab, the voltage distribution layer, and a plated via. Alternatively, the energizing current from the power source energizes a remotely-located chip mounted on the module by way of the voltage tab, the voltage distribution layer, a plated via, a voltage distribution stripe, and another plated via connected to the remotely-located chip. As a result, the module is connected directly to the power source, rather than being connected to the power source by way of a plurality of power distribution planes disposed within the printed circuit board.