The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 1986

Filed:

Feb. 10, 1986
Applicant:
Inventors:

Carl Campisi, Chicago, IL (US);

Abraham Lev, Glenview, IL (US);

Richard G Schmid, Glenview, IL (US);

Assignee:

Zenith Electronics Corporation, Glenview, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23P / ;
U.S. Cl.
CPC ...
29741 ; 29593 ; 29838 ;
Abstract

A crimping block is positioned immediately adjacent to one side of a circuit board having predrilled apertures therein through which the electrical leads of a circuit component are inserted. The crimping block includes a plurality of linearly displaceable crimping pins, each having an upper, beveled end adapted to receive, deflect and crimp an associated component lead inserted through an immediately adjacent circuit board aperture. Upon contact with an inserted component lead, the crimping pin is displaced downward a predetermined distance. During downward displacement of the crimping pin the electrical lead is deflected laterally followed by the upward deflection of the electrical lead upon the end of crimping pin travel. Upon the end of crimping pin travel, its beveled, upper end crimps the electrical lead in tight fitting relation with a circuit board-mounted conductor. Each crimping pin forms a conductive element in a sensor circuit which is completed upon positioning of an electronic component on the circuit board and insertion of its leads through the apertures therein in providing component insertion verification and operational testing.


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