The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 1986

Filed:

Nov. 25, 1983
Applicant:
Inventors:

Kevin D Kolwicz, Allentown, PA (US);

Gilbert L Mowery, Jr, Allentown, PA (US);

Assignee:

AT&T Bell Laboratories, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365203 ; 365210 ; 365233 ;
Abstract

The present invention relates to a glitch lockout circuit for a static random access memory (RAM) which prevents the writing or reading of incorrect data when a system clock is switched from a standard clock source to an alternate clock source. A dummy bit line is added to the memory arrangement which is always precharged during a first clock phase and discharged during a second clock phase. The state of the dummy bit line is latched with the first clock phase and is fed back to the clock generator to control the initiation of the second clock phase. Thus, if the dummy bit line stays low, the second clock phase will stay low and none of the RAM cells will be accessed.


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