Field effect transistor timing signal generator circuit

Abstract

A circuit for generating accurate timing pulses which includes a timer means, a reference and feedback amplifier means, a feedback difference amplifier means, a difference amplifier means and a pulse shaper means. The timer means includes a constant current source which is triggered on by the input waveform signal and produces current i.sub.c. Reference and feedback amplifier means generates a voltage V.sub.ref which is proportional to current i.sub.c. Thus, if i.sub.c is too high or too low, V.sub.ref will represent the error value. The d.c. reference signal V.sub.ref' is applied to the feedback difference amplifier means which is a typical dynamic detector circuit. Feedback difference amplifier circuit is triggered and changes state when the voltage of the constant current timing circuit (which is proportional to i.sub.c) equals the reference voltage V.sub.ref'. The output signal from feedback difference amplifier means is applied to the straightforward difference amplifier means for further amplification. The amplified output voltage signal is then applied to a pulse shaper circuit means along with the original input signal such that the timing of the input signal is adjusted in accordance with the signal from the difference amplifier to produce an output timing pulse.