The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 1986

Filed:

Feb. 14, 1985
Applicant:
Inventor:

Kazuo Ohzeki, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N / ;
U.S. Cl.
CPC ...
358147 ; 358148 ; 358905 ; 333 18 ;
Abstract

A timing control signal generator used in a Teletext signal waveform equalizer to remove waveform distortions in a Teletext signal inserted into a horizontal scanning line for a vertical blanking interval of a television signal and arranged to generate timing control signals for controlling the operation of the waveform equalizer. The timing of each of the timing control signals, at which the level variation thereof occurs, is predetermined. To generate these timing control signals by a small scale circuit arrangement, a pair of counters and a pair of read only memories are used. The first counter is cleared by a field start signal and counts sample clock pulses synchronized with the Teletext signal. The first ROM stores information indicative of level changes of the timing control signals and is accessed by the first counter. The level change information read out from the first ROM is counted by the second counter. The second counter accesses the second ROM which stores level information of the timing control signals at the level change timing of at least one of the timing control signals. The level information of the timing control signals read out from the second ROM is held in a latch circuit, thereby producing the timing control signals.


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