Register control processing system

Abstract

This invention relates to a register and more specifically to register control in a data processing system. In general, a number of control registers are theoretically required that is less than the maximum number which can be designated, and only the required number of registers are mounted as hardware. In order to add functions or to provide compatibility with other systems, it is sometimes required to use a register that is not mounted as hardware, or to use the registers mounted as hardware for conflicting purposes. Virtual registers are accordingly provided for at address locations in the memory of the processing system. However, if only the registers to be added are thusly provided for in the memory, the instructions must be executed by distinguishing between register access and memory access, in accordance with register number, etc. Thus, this invention provides a number of virtual registers for instance equal to the number that can be designated. The controls are thereby simplified in accordance with the kind of instruction to be performed. Namely, when an instruction is the LOAD instruction, the same content is loaded into both real an virtual registers from a respective address of the memory, and when it is the STORE instruction, the content from a respective virtual register is stored into the respective address of the memory.