The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 1986
Filed:
Dec. 06, 1984
Arnold Blum, Gechingen, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
The detailed testing of processors, manufactured according to very large scale integration principles, which also extends to secondary functions of operations, such as the setting or non-setting of particular state indicators, necessitates the transfer of large quantities of test data between the processor and the tester, for which purpose no distinction is drawn between external and integrated testers. For testing such structures, the known LSSD method is frequently used wherein the storage elements of the logic subsystems are combined in the form of shift register chains for testing. To permit a fast exchange of test data on the system bus, connecting the processor to a tester, interface register stages are also included in the shift register chain which has a garland-shaped structure and whose beginning and end are connected by a controllable switch during testing. During testing, the entry of test data and the emission of result data, which are in each case effected through the system bus and the shift steps of the garland-shaped shift register chain, overlap one another.