The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 1986
Filed:
Aug. 29, 1983
James G Ellsworth, St. Paul, MN (US);
Thomas E Wulling, St. Paul, MN (US);
Sperry Corporation, New York, NY (US);
Abstract
A digital communication bus upon which arbitration is distributed in a multiplicity of communicable interconnected bus interface logics supports unique signals to each associated on user device and upon the bus. Arbitration inhibiting signals, called inhibit request signals, allow any one(s) user device(s) to inhibit the new entrance, via requests, into arbitration of all other bus interconnected bus interface logics and associated user devices. Arbitration among bus interface logics already registering requests continues in priority order. Each user device may, via a signal called retract request, deregister, or cancel, requests previously registered at the associated bus interface logics to arbitrate for ownership of the bus. Each user device may, via a signal called stop bus, cause continuous interface logics while being precluded from recognition that arbitration should ever be won. When the highest priority one user device so exercises the signal stop bus, then its associated bus interface logics always wins arbitrated ownership of the bus, but naught is known by, or done with, any user device of such ownership; effectively meaning the bus is stopped of normal data communication. Any bus-owning user device may communicate a signal, called priority disable, to the associated bus interface logic and upon a dedicated line of the bus, which signal, called priority disable, to the associated bus interface logic and upon a dedicated line of the bus, which signal postpones the recognition of the winning of arbitration in order that the current bus-owning user may longer retain ownership. Any particular bus interface logics may be, responsively to the setting of a flip-flop called the bus enable flip-flop by any external agency such as any User device or maintenance processor, disabled of any bus activity whatsoever, locking out the associated user device.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile