The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 1986

Filed:

Oct. 09, 1984
Applicant:
Inventors:

Thomas J Aprille, Jr, Andover, MA (US);

Yen-long Kuo, Andover, MA (US);

Charles F Walker, Derry, NH (US);

Assignee:

AT&T Bell Laboratories, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B / ;
U.S. Cl.
CPC ...
375 12 ; 178 / ; 333 18 ;
Abstract

The circuit (10) has a gain section which includes a first AGC circuit (12). The output of the gain section goes to a signal shaping section which includes a biquadratic filter (24), a summer (45), and a second AGC circuit (40). The two AGC circuits (12,40) are controlled by respective separate peak detectors (20, 50) and are noninteracting. For 'short' cables, only the first AGC circuit (12) is active. For 'long' cables, the first AGC circuit (12) is set at its gain breakpoint and the second AGC circuit (40) alone has active control. The shaping section includes a biquadratic filter (24) which is a tandem arrangement of a low-pass filter (26), an inverter (28), and an integrator (32). The low pass output (35) of the integrator (32) is connected to the noninverting (+) input of the a summing amplifier (45). The input (42) of the second AGC circuit (40) is connected to the band pass output (33) of the inverter (28), while its output (44) is connected to the inverting input (-) of the summing amplifier (45). The input of the second peak detector (50) is connected to the output (48) of the summing amplifier (45) and its output is connected to the control node (52) of the second AGC circuit (40). Operational amplifiers (G1,G2,G3,G4) of the first peak detector (20), the low-pass filter (26), the integrator (32), and the summing amplifier (45) are designed to be programmable by means of decoders (22, 36, 38, 46) to permit the equalizer (10) to accommodate different data rates.


Find Patent Forward Citations

Aprille, Jr, Thomas. (1986). Programmable automatic cable equalizer (U.S. Patent No. 4606043). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4606043

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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