Microcomputer addressing system and electronic timepiece utilizing the

Abstract

A microcomputer comprises an address decoder (23) for providing address signals to a random access memory (21). The address decoder (23) is adapted to generate a plurality of address signals in accordance with one piece of instruction data obtained from an instruction register (10). On the other hand, a control circuit (11) is provided for generating change signals in response to the instruction data for controlling a T type flip-flop (24, 25 or 26). The address decoder is responsive to the signal from the T type flip-flop to select and provide one of the plurality of address signals. Accordingly, a plurality of addresses are designated in accordance with one piece of the instruction data, whereby one of them is selected by a change signal. Thus, a program for addressing a random access memory can be simplified. The microcomputer is advantageously employed in an electronic timepiece employing a microcomputer by adapting such that a plurality of pieces of alarm timing data are subjected to the same processing of detection of coincidence with the current time.