The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 1986
Filed:
Jan. 25, 1984
Applicant:
Inventors:
Masaru Uya, Hirakata, JP;
Katsuyuki Kaneko, Osaka, JP;
Assignee:
Matsushita Electric Industrial Co., Ltd., Kadoma, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364784 ;
Abstract
A full adder is constituted with complementary MOS FETs, wherein delay time of adding time and carry signal delay time are shortened as a result of reduced number of stages of signal processing gates.