The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 1986

Filed:

May. 01, 1984
Applicant:
Inventors:

Marcellinus J Pelgrom, Eindhoven, NL;

Johannes G Raven, Eindhoven, NL;

Jan W Slotboom, Eindhoven, NL;

Hendrik A Harwig, Eindhoven, NL;

Marcellinus J Annegarn, Eindhoven, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
Q11C / ;
U.S. Cl.
CPC ...
365238 ; 365189 ;
Abstract

In a series-parallel-series memory circuit (3) which requires a write clock signal (at 19), a transfer clock signal (at 25) and a read clock signal (at 31), it is sufficient, because a clock signal processing circuit (23) is provided, to apply only two clock signals (to 33 and 35). Using a gate circuit (41), it is possible to obtain from one clock signal (applied to 35) additional information, which is provided by means of pulse duration variation, for adapting the time delay of the memory circuit (FIG. 1).


Find Patent Forward Citations

Pelgrom, Marcellinus. (1986). Integrated memory circuit of a series-parallel-series type (U.S. Patent No. 4599710). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4599710

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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