Clock pulse generating circuit in a color video signal reproducing

Abstract

A clock pulse generating circuit in a color video signal reproducing apparatus comprises a first PLL supplied with a horizontal synchronizing signal within a time-division-multiplexed signal reproduced from a recording medium and having a response characteristic such that the first PLL can sufficiently follow a time base deviation in the horizontal synchronizing signal, a second PLL supplied with the horizontal synchronizing signal and having a response characteristic such that the second PLL substantially does not follow a time base deviation or noise in the horizontal synchronizing signal, a circuit for resetting a variable frequency oscillator within the first PLL by a reset signal, where the reset signal is obtained by tapping a signal which is subjected to a phase comparison with the horizontal synchronizing signal in a phase comparator within the second PLL, and a switching circuit for producing a write-in clock pulse from a pulse which is obtained from the first PLL during a write-in operation of memory circuits within first and second time base expanding circuit of the reproducing apparatus and for producing a read-out clock pulse from a pulse which is obtained from the second PLL during a read-out operation of the memory circuits within the first and second time base expanding circuit.