The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 1986
Filed:
Mar. 27, 1984
Roger R Bracht, Colorado Springs, CO (US);
Dorrel R Silvey, Elbert, CO (US);
Optical Storage International-U.S., Minneapolis, MN (US);
Abstract
A circuit is shown for rapidly enabling and disabling a high current laser diode through a coaxial cable responsive to a data signal received at the circuit input. At the circuit input are two switching transistors, one or the other of which is forward biased while its counterpart is reverse biased, depending upon the level of the incoming data signal. The output of one of the switching transistors is fed to the base inputs of two emitter follower transistors, one PNP and the other NPN. The emitter terminals of the follower transistors are connected to the gate terminal of an enhancement mode VMOS field effect transistor. When the VMOS FET is enabled, current flows in the laser diode to energize it. The voltage level at the input to the follower transistors determines the voltage to the gate input of the FET. When the incoming data signal is low, the gate-to-source potential difference is near zero, thus preventing the FET from conducting current. A change to the high level for incoming data rapidly increases the gate-to-source voltage to enable the FET and activate the laser.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile