The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 1986
Filed:
Nov. 04, 1983
Mohammad Y Maniar, San Jose, CA (US);
Steven Dines, San Jose, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A circuit for controls external bipolar buffers for an MOS peripheral device capable of operating in master end slave modes. The circuit provides for a slave mode logic block and a master mode logic block for generating a DATA TRANSMIT ENABLE SIGNAL to permit the bipolar buffer to transmit data signals from the peripheral device to a system bus. The circuit also provides for a second slave mode logic block and a master mode logic block for generating a DATA RECEIVE ENABLE block to permit the bipolar buffer to transmit data signals from the system bus to the peripheral device. Each slave mode logic block is responsive to condiion signals, such as CHIP SELECT and READ/WRITE. Each master mode logic block is responsive to timing signals and signals generated internally within the periphel device so that the master mode DATA RECEIVE and DATA TRANSMIT signals occur only in predetermined timing cycles.