The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 1986
Filed:
Mar. 01, 1985
Tsuguo Inata, Isehara, JP;
Shigehiko Sasa, Isehara, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
In order to make IC comprising high electron mobility semiconductor device, it is necessary to make the carrier in channel layer not to loose its high mobility by thermal treatment in the IC fabrication process. It has been found that the mobility of two dimensional electron gas (2DEG) is lost by scattering of ionized impurity diffused from doped layer into spacer layer which separates the 2DEG in channel layer from the doped layer. So another spacer (second spacer) is inserted between the spacer (first spacer) and the doped layer to prevent the diffusion of impurity. Proposed multilayered structure is as follows. A channel layer made of i-GaAs is formed on a high resistivity GaAs substrate. Upon which a first spacer layer (prior art) of undoped Al.sub.x Ga.sub.1-x As is formed, over which the second spacer layer of i-GaAs is formed, then over which the doped layer of n-Al.sub.x Ga.sub.1-x As is formed. The thickness of the second spacer layer is approximately 20 .ANG., and that of the first spacer is approximately 40 .ANG.. Applying such structure to the high electron mobility transistor, it could bear the heat treatment of 750.degree. C. 10 min. and more that 950.degree. C. 10 sec. annealing.