The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 1986

Filed:

Apr. 05, 1984
Applicant:
Inventors:

Tulon C McRight, Jr, Huntsville, AL (US);

William A Friday, Huntsville, AL (US);

Ronald W Mitchell, Huntsville, AL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307271 ; 307593 ; 307266 ; 250338 ;
Abstract

A synchronization circuit responds to externally supplied trigger input signals to provide a time adjustable output trigger pulse to a laser or other similar device at a desired time to initiate or control operation of the device. The synchronizer circuit provides a precise voltage pulse output in response to a square wave frequency signal input. The square wave input is processed and coupled to a linear comparator for subsequently driving a series connected multivibrator network. The multivibrator network is further controlled by a delay selector circuit for precisely adjusting the output time delay of the multivibrator output pulse. The output from the multivibrator network is coupled into a pulse repetition rate control circuit which is comprised of first and second series connected decade counters which also have selected outputs coupled to an array of NAND gates. Each of the NAND gates are further connected to a trigger rate selector switching circuit for selecting the repetition rate or frequency at which a triggered output from the synchronizer circuit would occur. For a trigger input pulse rate the respective NAND gates divide the pulses per second by known integer values to control the output trigger signal rate from the synchronizer circuit.


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