Decoder for self-clocking serial data communications

Abstract

Apparatus for decoding a self-clocking, encoded signal wherein a series of data bits is encoded such that for each data bit, the encoded signal contains a first transition, and, for each data bit for which the succeeding data bit has the same binary value, the encoded signal contains a second transition occurring within a predetermined time interval after the first transition. The decoding apparatus comprises storage means responsive to a clocking signal of at least a predetermined minimum pulse width, received at a clock input for storing a sample of a digital signal received at a data input, the storage means having at least one output indicative of the stored value; an exclusive-OR gate; a first signal path from the output of the storage means through the exclusive-OR gate to the clock input of the storage means; a second signal path from the source of the encoded signal through the exclusive-OR gate to the clock input of the storage means; and a third signal path from the source of the encoded signal to the data input of the storage means; the time for a signal to propagate along the first signal path being at least as long as the minimum pulse width required to clock the storage means; and the difference between the time for a signal to propagate along the second signal path and the time for a signal to propagate along the third signal path being at least as long as said predetermined time interval.