The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 1986

Filed:

Dec. 08, 1983
Applicant:
Inventor:

Frank W Lin, Los Altos, CA (US);

Assignee:

TeleVideo Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
328165 ; 307542 ; 307445 ; 377 75 ; 318602 ;
Abstract

A noise blanking circuit for eliminating evidence of noise present in an incoming alternating electrical control signal, such as a shaft encoder or tachometer signal in a servo control circuit, is disclosed. The alternating electrical signal is input to a first input of a shift register having a plurality of outputs. Clock signals having a preselected frequency are input to a second input of the shift register for digitally sampling the alternating electrical signal at the times of occurrence of the clock signals so as to produce digital samples shiftably stored in respective storage locations of the shift register, which are connected to the plurality of outputs of the shift register. The digital samples appearing at predetermined ones of the plurality of outputs of the shift register are input to a logic circuit for producing a first logic state (low state) as an output signal, when a first logic state appears at the predetermined ones of the plurality of outputs of the shift register, and a second logic state (high state) as the output signal, when a second logic state appears at the predetermined ones of the plurality of outputs of the shift register. The selectivity of the noise blanking circuit can be selected by adjusting the clock signal frequency and/or the number of storage locations included in the shift register and/or changing the predetermined ones of the plurality of outputs of the shift register which are input to the logic circuit. Other features are also disclosed.


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