The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 1986

Filed:

Sep. 02, 1983
Applicant:
Inventors:

Shanker Singh, Fishkill, NY (US);

Vijendra P Singh, Saratoga, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; G06F / ;
U.S. Cl.
CPC ...
371 10 ; 371-5 ; 371 21 ;
Abstract

Spare chips are employed together with a replacement algorithm to replace chips in memory array when failure is generally more extensive then unrelated cell fails in the memory chips. That is, substitution will be made if an error condition is a result of the failure of a whole chip (chip-kill), a segment of a chip (island-kill), a column of bits of a chip or a row of bits of a chip but will not be performed when it is due to a single failed cell. The replacement of a chip with a chip-kill or with an island-kill is done on the fly and involves only a row of the memory chips or elements leaving other elements of the memory unaffected by the replacement.


Find Patent Forward Citations

Singh, Shanker. (1986). Memory correction scheme using spare arrays (U.S. Patent No. 4584681). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4584681

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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