The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 1986

Filed:

Sep. 15, 1983
Applicant:
Inventors:

Yuji Ito, Yokohama, JP;

Toshinori Murata, Yokohama, JP;

Masafumi Kazumi, Tokyo, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
3403 / ;
Abstract

A D/A converter comprises one or both of a first D/A converter and a second D/A converter. In the first D/A converter, n (n.gtoreq.2) semiconductor devices are connected in parallel to each other between a power supply and a load resistor, gates of (n-1) semiconductor devices (called a first group of semiconductor devices) of the n semiconductor devices are connected to a common gate bias potential source, those semiconductor devices of the first group of semiconductor devices which are equal in number to the number determined by a content of high order bits of an input digital data are turned on to supply a current to the load resistor, and a voltage drop across the load resistor is outputted as an analog quantity representing the high order bits. In the second D/A converter, a gate voltage determined by a content of low order bits of the input digital data is supplied to a gate of the remaining one (called a second semiconductor device) of the n semiconductor device to supply a current to the load resistor, and a voltage drop across the load resistor is outputted as an analog quantity representing the low order bits.


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