The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 1986
Filed:
Jun. 06, 1983
Applicant:
Inventor:
Richard Noto, Maple Shade, NJ (US);
Assignee:
The United States of America as represented by the Secretary of the Army, Washington, DC (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364491 ; 364300 ;
Abstract
A computer process for the automatic layout of a multiport, two-dimensional icrocircuit. The program provides for improved cell placement and power distribution while minimizing the overall chip area dimensions. The power distribution layout provides for the supply of power to cell rows which is independent of the peripheral power routes.
Noto, Richard. (1986). Automated design program for lsi and vlsi circuits (U.S. Patent No. 4580228). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4580228
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile