The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 1986

Filed:

Feb. 29, 1984
Applicant:
Inventor:

Milton D Bloomer, Scotia, NY (US);

Assignee:

General Electric Company, Schenectady, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323238 ; 323243 ; 323245 ;
Abstract

A soft-starting phase-control circuit for controlling both the cold in-rush and normal operating flows of current through a load from an A.C. source. The load may be resistive, may have a non-zero resistance temperature coefficient and may require a load voltage thereacross lower than the voltage provided by the A.C. source connected to the load and the control circuit. The control circuit utilizes at least one power switching device for selectively enabling and disabling the connection between source and load responsive to turn-on and turn-off states of a control signal provided at the output of a gate subcircuit. The gate subcircuit provides a turn-on state at a time, after each zero crossing, variably responsive to either a sensed load parameter when the load is in the normal operating condition, or to a selected starting sequence each time the load is initially energized (either intentionally or responsive to recovery from a detected fault condition) to limit in-rush current to a relatively low multiple of the normal operating current. The start-up sequence of load turn-on states is responsive to gate enabling signals provided by comparison of a reference level with the instantaneous magnitude of a ramped signal, itself terminated and restarted at each line zero crossing. Only if a phase-locked loop has been synchronized to the source line voltage zero crossings can the gate means be driven to the turn-on state. The exact time when the ramp signal reaches the reference level is controlled by integration of the sum of the outputs of selected ones of a plurality of current sources.


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