The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 1986
Filed:
May. 09, 1983
Richard C Eden, Thousand Oaks, CA (US);
George R Kaelin, Thousand Oaks, CA (US);
Rockwell International Corporation, El Segundo, CA (US);
Abstract
A random access memory circuit for use with positive and negative supply voltages, a read enable line, an output line, and write '1' and '0' lines includes first, second, third, and fourth level shifting diodes. A first input isolation diode is connected between the write '1' line and the first level shifting diode. A second input isolation diode is connected between the write '0' line and the cathode of the third level shifting diode. The drain of a first write FET is connected to the anode of the third diode, the source is connected to the read enable line, and the gate is connected to the cathode of the second level shifting diode. A second write FET has its drain connected to the anode of the first level shifting diode, its source connected to the read enable line, and its gate connected to the cathode of the fourth diode. An output buffer FET is connected by its source to the read enable line, by its gate to the cathode of the fourth diode. An output isolation diode is connected between the drain of the output buffer FET and the output line.