The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 1986
Filed:
Aug. 22, 1983
Howard Handler, Westminster, CA (US);
Ronald L Wilson, Anaheim, CA (US);
Industrial Design Associates, (IDA), Newport Beach, CA (US);
Abstract
A high frequency ballast circuit is provided having first and second power input terminals and first and second power output terminals. The high frequency ballast circuit is powered by an input voltage source, such as an off-line, filtered, rectified dc voltage source. The high frequency ballast circuit has a starting mode and operating mode. The high frequency ballast circuit comprises: a power oscillator circuit having power oscillator first and second output terminals, for converting power coupled from the high frequency ballast circuit first and second power input terminals to a relatively high frequency, quasi-sinusoidal, current-limited voltage source applied between the power oscillator first and second output terminals. A starting circuit for interposing a periodic voltage pulse between the power oscillator first output terminal and the lamp load. The periodic voltage pulse is adapted to exceed the ionization potential of the lamp load during the starting mode. The starting and current limiting circuit also provides a predetermined reactance between the first power oscillator output terminal and the high frequency ballast circuit first power output terminal to limit current through the fluorescent lamp load. In an alternative embodiment, the starting and current limiting circuit is further adapted to interrupt the periodic voltage pulse during the operating mode. In another alternative and particularly preferred embodiment, the starting and current limiting circuit uses a SIDAC device and provides start pulses to the lamp load at approximately one second intervals until the lamp load ionizes.