The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 1986
Filed:
Dec. 13, 1984
Roxy N Fan, E. Brunswick, NJ (US);
E. I. Du Pont De Nemours and Company, Wilmington, DE (US);
Abstract
Process for preparing multilayer printed circuits comprising laminating to a substrate bearing a circuit pattern or electrically conductive surface a photosensitive layer which is tacky or becomes tacky upon exposure; exposing the laminate to actinic radiation through a via image related to the underlying circuit pattern, if present; optionally removing the removable via image of the photosensitive layer in either the exposed or unexposed areas, e.g., with a solvent or peeling apart by removal of a cover sheet, if present; laminating to the remaining tacky photosensitive layer a layer of a second photosensitive composition; exposing the laminate to actinic radiation through a registered image pattern of at least one overlying segment of the via image area and conductive circuit pattern to form an image surface having nontacky areas and removable circuit image areas; removing the removable circuit image areas of the photosensitive layer in the exposed or unexposed areas with a solvent therefor, or peeling apart by means of a cover sheet, if present, the removable via image areas of the lower photosensitive, if present, are removed by a solvent therefor; embedding finely divided material, e.g., copper, into the tacky areas; optionally curing the laminate by means of actinic radiation and/or heat; plating electrolessly to form an interconnected electrically conductive circuit. Additional circuit layers can be added.