The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 1986

Filed:

Mar. 15, 1985
Applicant:
Inventors:

Mark S Birritella, Phoenix, AZ (US);

Kevin McLaughlin, Chandler, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
2957 / ; 29578 ; 29591 ; 148-15 ; 148175 ; 148187 ; 148D / ; 357 34 ; 357 91 ;
Abstract

A means and method is described for forming closely spaced contacts to adjacent semiconductor regions, such as the base and emitter of a bipolar transistor, so that the lateral voltage drops between the contacts and an intervening junction are minimized. The emitter and base and the contacts thereto are self-aligned. This is accomplished by a structure utilizing two poly-layers separated by one or more intermediate dielectric layers. The upper of the two poly-layers serves as a selective etching mask for defining the contact geometry and separation. The lower of the two poly-layers has one portion which becomes a poly-contact and diffusion source for the base region and a second portion which becomes a poly-contact and diffusion source for the emitter region. A single mask is used in connection with ion bombardment to alter the etch rate of portions of the poly-layers. This mask together with subsequent etch steps, defines the emitter width and location and the base-emitter contact separation. The process is self-aligning.


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