The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 1986

Filed:

Jul. 16, 1982
Applicant:
Inventors:

Rahul Sud, Colorado Springs, CO (US);

Kim C Hardee, Colorado Springs, CO (US);

Assignee:

Inmos Corporation, Colorado Springs, CO (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365227 ; 365200 ; 365203 ;
Abstract

A low power I/O scheme is described which is particularly useful in wide word semiconductor memories which include redundant memory cells as well as regular memory cells. In the present scheme, conventional load transistors for a main data bus are turned off during all write operations to conserve power. In addition, predata lines which carry data between memory cells and the main data buss include load transistors that are turned off during normal read or write operations to conserve additional power, and turned on during spare read or write operations to preserve the stability of unselected regular cells. The predata lines are also preferably held above ground potential during read or write operations to prevent conduction of deselected column select transistors.


Find Patent Forward Citations

Loading…