The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 1986

Filed:

Mar. 09, 1983
Applicant:
Inventor:

Hugo W Chan, Fremont, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
2957 / ; 29571 ; 29589 ; 29578 ; 2957 / ; 148-15 ; 148174 ; 357 41 ; 357 51 ; 357 59 ; 357 71 ;
Abstract

A fabrication method and resulting integrated circuit structure that provide a second level of interconnect, a low resistance contact strap between underlying layers which is not sensitive to alignment and low lateral diffusion polysilicon load. The method comprises the steps of providing contact openings in an insulating layer on a wafer to any desired underlying circuit layers, depositing a silicide layer on the wafer, removing selected portions of the silicide layer, depositing a polysilicon layer on the wafer, lightly doping the polysilicon layer to a level appropriate for the resistor, and then removing portions of the polysilicon along with underlying silicide.


Find Patent Forward Citations

Chan, Hugo. (1986). Method of forming a low resistance quasi-buried contact (U.S. Patent No. 4569122). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4569122

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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